A Comparative Study of CSA Design using CNTFET and MOSFET
This paper enumerates the design and analysis of a Carry Select Adder (CSA) using Full Adder cell. The Full Adder is designed using MOSFET 32nm model, Stanford University CNTFET model and proposed 10nm CNTFET model. There are many issues facing while integrating more number of transistors like short channel effect, power dissipation, scaling of the transistors. Inorder to overcome these problems and still reduce transistor size, Carbon Nano Tube Field Effect Transistors or CNTFETs have promising applications in the field of electronics. The carbon nanotube is emerging as a viable replacement to the MOSFET. The transient and power analyses in this paper are obtained with operating voltage at 0.9V. The simulation results are presented and the analyses are compared with circuits designed using 32nm MOSFET. The comparison of results indicated that the proposed 10nm CNTFET based design is more efficient in power savings and speed.
A. Javey, J. Guo, Q. Wang, et. al., ―Ballistic Carbon Nanotube Field Effect Transistor‖, Nature, Vol. 424, pp. 654 – 657, 2003.
Mehdi Bagherizadeh, Mohammed Eshghi, ―A Low Power & High Speed Carbon Nanotube 5 to 3 Compressor‖, Faible Tension Faible Consommation, pp. 115 – 118, 2011
V. Sridevi and T. Jayanthi, ―HSPICE Implementation of CNTFET Half and Full Subtractor‖, IJAEST, Vol. 11, Issue 1, 089 – 095.
R. Severns, J. Armijos, ―MOSFET Electrical Characteristics‖, MOSPOWER Applications Handbook, Siliconix, Inc., 1984, pp. 3-1 through 3-8.
T. Ravi, V. Kannan, ―Design and Analysis of N-Type CNTFET Double Edge Triggered D Flipflop Based SISO Shift Register‖, ICONSET 2012,Sathyabama University.
J. Deng, H. S. P. Wong, ―A Compact SPICE Model for CNTFET Including Non-idealities and It’s Application – Part I : Model of the Intrinsic Channel Region‖, Vol. 54, pp. 3186 – 3194, 2007.
Phaedon Avouris, Joerg Appenzeller, Richard Martel, and Shalom J. Wind. Carbon nanotube electronics. Proceedings of the IEEE, 91(11):1772–84, November 2003.
Anuj Pushkama, Sajna Raghavan and Hamid Mahmood, ―Comparison of Performance Parameters of SRAM Designs in 160nm CMOS and CNTFET Technolgies‖, IEEE Trans., 340 – 341.
Heng Chin Chuan, ― Modelling and Analysis of Ballistic Carbon Nanotube Field Effect Transistor (CNTFET) with Quantum Transport Concept‖, 2007, unpublished.
Michael J. O’Connell, ―Carbon Nanotubes – Properties and Applications‖, Taylor and Francis Group, LLC., 2006, pp. 084 – 114.
Stanford University CNFET Model website – http://nano.stanford.edu/model.php?id=23
Anisur Rahman, Jing Guo, Supriyo Datta, and Mark S. Lundstrom. ―Theory of ballistic nanotransistors‖. Electron Devices, IEEE, 50(9):1853–1864, September 2003.
I. O’Connor, J. Liu, F. Gaffiot. ―CNTFET-based logic circuit design. IEEE-June 2006.
Bipul C. Paul, Shinobu Fujita, Masaki Okajima, and Thomas Lee. ―Modeling and analysis of circuit performance of ballistic CNFET‖. In 2006 Design Automation Conference, San Francisco, CA, USA, 24-28 July 2006.
Massoud Pedram, Xunwei Wu ‖ A New Design for Double Edge Triggered Flip-flops‖, University of Southern California, Hangzhou University Hangzhou, DARPA under contract # F33615-95- C-1627 and Project No.69773034 of NSFC.
R. Martel, T. Schmidt, H.R. Shea, T. Hertel, and Ph. Avouris, Single- and Multi-wall Carbon Nanotube Field-effect Transistors, Applied Physics Letters, October 1998.
- There are currently no refbacks.
This work is licensed under a Creative Commons Attribution 3.0 License.