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Reduction of Noise Using Low Power Design of Adaptive Median Filter

C. Kumar Charlie Paul, K. Megala Devi, M. Hemapriya, J. Felcia Jerline

Abstract


This paper presents a low power vlsi based noise removal and the experiments show, the proposed technique performs significantly better than standard median filter and achieves superior image quality. The intensity of impulse noise has the tendency of being either relatively high or relatively low. Thus, it could severely degrade the image quality and cause great loss of information details. So it is important to eliminate noise in the images before some subsequent processing. Image processing functions, like FIR filtering, pattern recognition or correlation, where the parallel implementation is supported by architecture matched special purpose arithmetic; high throughput FPGA circuits easily outperform even the most advanced DSP processors. Then Adaptive Median Filter solves the dual purpose of removing the impulse noise from the image and reducing distortion in the image. Adaptive Median Filtering can achieve the filtering operation of an image corrupted with impulse noise.

Keywords


FPGA, FIFO

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References


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