Open Access Open Access  Restricted Access Subscription or Fee Access

Area and Power Efficient DWT using Reduced Complexity Wallace Multiplier

S. Anantha Priyadharsini, G.R. Mahendra Babu


VLSI design approach of a high speed and 1-D
Discrete Wavelet Transform (DWT) using Modified Wallace
Multiplier is proposed. Modified Wallace multiplier uses full adders and half adders for area reduction phase. In Full adders the partial product bits are reduced. Due to this the complexity of the modified Wallace multiplier is reduced. Further a Post truncation method is applied to modified Wallace multiplier for area reduction. In this way, it reduces the area and power compared to previous Wallace multiplier. The proposed truncated modified Wallace multiplier for 8*8 bit is applied to 1-D DWT to reduce the area. Modified Wallace multiplier for 8*8 bit, 9*9 bit and 10*10 bit applied in 1-D DWT, its reduces the area and power. Totally, it provides a very high speed processing as well as high quality.


Wallace Multiplier, 1-D DWT, Post Truncation, Complexity, Area, Power.

Full Text:



Ron S. Waters, Member, Earl E.Swartzlander, Jr.,Fellow, ―A Reduced

Complexity Wallace Multiplier Reduction‖ IEEE Trans.Computers,

vol. 59, no. 8, Aug. 2010.

C.S. Wallace, ―A Suggestion for a Fast Multiplier,‖ IEEE Trans.

Electronic Computers, vol. 13, no. 1, pp. 14-17, Feb 1964.

E. Bloch, ―The Engineering Design of the Stretch Computer,‖ Proc.

Eastern Joint IRE- AIEE-ACM Computer Conf., no. 16, pp. 48-58,

L. Dadda, ―Some Schemes for Parallel Multipliers,‖Alta Frequenza,

vol. 34, pp. 349-356, 1965.

B. Parhami, Computer Arithmetic Algorithms and Hardware Designs.

Oxford Univ. Press, p. 179, 2000

K.C. Bickerstaff, M.J. Schulte, and E.E.Swartzlander Jr., ―Parallel

Reduced Area Multipliers,‖ J. VLSI Signal Processing Systems, vol.

, no. 3, pp.181-191, Apr. 1995.

W.J. Townsend, E.E. Swartzlander Jr., and J.A. Abraham, ―A

Comparison of Dadda and Wallace Multiplier Delays,‖ Proc. SPIE,

Advanced Signal Processing Algorithms, Architectures, and

Implementations XIII, pp. 552-560, 2003.

S. Waters, MATLAB based Wallace and Modified Wallace Multiplier


Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, and

Daoud Berkani, ―VLSI Design of 2-D Discrete Wavelet Transform for

Area-Efficient and High-SpeedImage Computing‖ World Academy of

Science, Engineering and Technology 45 2008.

Niichi Itoh, Yuka Naemura, Hiroshi Makino, Yasunobu Nakase,

Tsutomu Yoshihara, and Yasutaka Horiba, ―A 600-MHz 54 x 54-bit

Multiplier with Rectangular-Styled Wallace Tree‖, JSSC,vol.36, no. 2,

February 2001.

Robert Montoye, ―A Double Precision Floating Point Multiply‖,

ISSCC 2003.

Yuan-Ho Chen, Tsin-Yuan Chang, and Chung-Yi Li.‖ High Throughput

DA-Based DCT With High Accuracy Error-Compensated Adder Tree‖,

IEEE Transactions On Very Large Scale Integration (VLSI) Systems,

Vol. 19, No. 4, April 2011.

Nicola PetraDavideDe Caro Valeria Garofalo, Ettore Napoli, and

Antonio Giuseppe Maria Strollo, ―Design of Fixed-Width Multipliers

With Linear Compensation Function‖, IEEE Transactions On Circuits

And Systems—I: Regular Papers, Vol. 58, No. 5, May 2011.

Jiun-Ping Wang, Shiann-Rong Kuang, and Shish-Chang Liang, ―High-

Accuracy Fixed-Width Modified Booth Multipliers for Lossy

Applications‖, IEEE Transactions On Very Large Scale Integration

(VLSI) Systems, Vol. 19, No. 1, January 2011.

Basant K. Mohanty, and Pramod K. Meher, Parallel and Pipeline

Architectures for High-Throughput Computation of Multilevel 3-D

DWT‖, IEEE Transactions On Circuits And Systems For Video

Technology, Vol. 20, No. 9, September 2010.

A. Haj, ―Fast Discrete Wavelet Transformation Using FPGAs and

Distributed Arithmetic,‖ International Journal of Applied Science and

Engineering, 2003, 160-171.

S. Khanfir, M. Jemni, ―Reconfigurable Hardware Implementations for

Lifting-Based DWT Image Processing Algorithms,‖ ICESS’08, 2008,

pp. 283-290.

S.L. Bishop, S. Rai, B. Gunturk, J.L. Trahan, R.Vaidyanathan,

―Reconfigurable Implementation of Wavelet Integer Lifting

Transforms for Image Compression‖, ReConFig’06, pp.1-9,



  • There are currently no refbacks.

Creative Commons License
This work is licensed under a Creative Commons Attribution 3.0 License.