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Design and Implementation of Novel ‘n’-bit Inverter and Buffer using Reversible Gates in QCA

P. Vanjipriya, R. Gowri Shankar

Abstract


Moore’s law states that the number of transistors that could be integrated into a single die would grow exponentially with time. Thus this causes increasing computational complexity of the chip and physical limitations of devices such as power consumption, interconnect will become very difficult. According to recent analysis the minimum limit for transistor size may be reached. Thus, it may not be possible to continue the rule of Moore’s law and doubling the clock rate for every three years. So in order to overcome this physical limit of CMOS-VLSI design an alternative approach is Quantum dot Cellular Automata (QCA).in inverter and buffers a majority gates plays a vital role. In this survey a   novel programmable inverter/buffer using XOR-Logic is taken for analysis and a new programmable novel inverter/buffer is designed based upon QCA technology. This modified novel reversible gates used in the design. This will lead to reduce number of QCA cells so that total area and circuit complexity of inverter/buffer can be minimized compare to previous designs. It also achieves reduced power consumption and high speed performances than all other existing and conventional X-OR gates design which uses normal inverter/buffer.


Keywords


Moore’s Law, CMOS, Area, Power Consumption, Quantum Dot Cellular Automata (QCA), Reversible Gates, Inverter/ Buffer.

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References


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