Implementation of XTEA in FPGA to Resolve the Attacks on TEA

Abstract

The embedded hardware plays a vital role in the implementations of many cryptographic applications to increase the security with reduced area consumption. The applications based on data communication demands the encryption process for sensitive data transmission from one end to the other end. The software implementation of security algorithms is easy to implement but it lags in its execution speed and performance. Therefore, the hardware implementations are considered to be a good alternative, since they provide additive performance along with low power consumption and less memory. The tiny encryption algorithm TEA is one of the fastest and efficient cryptographic algorithms, which is well suited for many such real time data communications that requires moderate security. An extended tiny encryption algorithm XTEA is a corrected form of TEA which resolves the drawbacks of TEA in real time implementation such as related key and plain text attacks. This paper discusses and analyzes the hardware implementation of XTEA with TEA in FPGA to overcome the above drawbacks associated with it.