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Design Procedure for Low Dropout Voltage Regulator for Portable Devices Application

Naimish Rathod, Jayesh Popat, Deven G. Patanvariya

Abstract


The Paper focuses on the realization of Power Efficient low voltage, low drop-out regulators these characteristics are driven by portable and battery operated products requiring compactness and low power. The approach adopted is to develop circuit techniques. As a result future and more advanced technologies will have even greater benefits and reflect the necessary sequence of event. Regulators are an essential part of any electrically powered system, which includes the growing family of applications of portable battery operated products. Regulators are required to reduce the large voltage variations of battery cells to lower and more acceptable levels. As a result, low drop-out regulators and other power supply circuits are always in high demand. In this paper design Procedure of Low Voltage Low Drop Out Voltage Regulator is Proposed and Implemented on 180nm Technology. It Discusses a 1.4 to 1.8 V 100mA CMOS Low DropOut Linear Voltage Regulator with single compensation Capacitor of 100pF. The Experimental Results show that the Maximum Output Load Current is 100mA and the Regulated Output Voltage is 1.2V. The Line Regulation is measured 4.74mV and Load Regulation measured 290uV in LTSpice Tool.


Keywords


Low Drop-Out, Low-Voltage Regulators, CMOS, Linear Regulator, Power Supply Circuits, Regulators.

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References


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