Implementation of Simulated Annealing Strategies for the Initialization Sequences Construction of Digital Circuits

Abstract

In this paper we propose a new algorithm for the construction of initialization sequences of synchronous sequential circuits. To resolve this problem we are encouraged to use a new optimization strategy which is "simulated annealing». For this we used the methods of technical analysis, the theory of Boolean functions, the switching circuits and their modeling logic, automata and evolutionary computation methods. Essentially in our work we use the model of synchronous sequential circuits, in which we allocate a combinational block and a block of the state of the elements represented by D-triggers. In the construction of evaluation functions we use the task of modeling a circuit intact or defective. This is done by breaking the return lines (feedback) and using a model of the equivalent iterative combinatorial. The advantage of this strategy, unlike the deterministic methods, is the ability of working with large circuits. The result of our work is summarized in two points: the study of simulated annealing algorithm to use to identify problems in the construction of initialization sequences and the development of a single-level algorithm for the simulation of annealing and construction of initialization sequences by checking their equivalence.