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Design of Stuck at Fault Testable Reversible Circuits
Abstract
Quantum Cellular Automata (QCA) is perfect replacement of Complementary Metal Oxide Semiconductor (CMOS) technology for digital designs. As transistors decrease in size to accommodate in a single die, it increases chip computational capabilities. However, transistors cannot get much smaller than their current size. The quantum-dot cellular automata (QCA) approach represents one of the possible solutions in overcoming this physical limit. It can be implemented by using reversible gates which will not dissipate power during computation. In general, the testing of sequential circuits is difficult as compared to combinational circuits since it need to test along with the previous state. In this paper, the sequential circuit based on reversible logic can be tested using only two test vector, thereby eliminating the need for any type of scan-path access to internal memory cells. The two test vectors are all 1s and all 0s. The designs of two vectors testable latches, master-slave flip-flops and double edge triggered (DET) flip-flops are presented. Along with that a new design for multiplexer is implemented based on conservative QCA logic, that is not reversible in nature but has similar properties as the Fredkin gate of working as 2:1 multiplexer. The proposed MX-cqca gate surpasses the Fredkin gate in terms of complexity (the number of majority voters), speed, and area. The importance of the proposed work lies in the fact that it provides the design of reversible sequential circuits completely testable for any stuck-at fault by only two test vectors.
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References
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