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Energy Saving Scheme Using Adiabatic Flip-Flops

N. Parthibhan, Vishnu K. Nair, S. Ravi

Abstract


To reduce energy consumption, adiabatic logic families are used, which utilizes AC voltage supplies to recycle energy of circuits instead of being dissipated as heat, a flip flop is realised using PAL-2N (pass transistor adiabatic logic) logic. Using this sequential circuit is implemented. The energy saving is further attained by including power gating in the circuit. With the help of simulation results, it’s shown that energy loss for this adiabatic sequential circuit with power-gating technique is reduced greatly.

Keywords


power estimation,PAL-2N,A JK-flip flop

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References


“Low power flip-flop design based on PAL-2N structure”. K.W. Ng, K.T. Lau, Division of Circuits and Systems, School of Electrical and Electronic Engineering, Nanyang Technological University, Nanyang Avenue,Singapore 639798, Singapore Accepted 3 May 1999.

Weiqiang Zhang,Dong Zhou, Xuanyan Hu”The implementation of adiabatic flip-flops and sequential circuits with power gating schemes” Faculty of Information Science and Technology Ningbo University ,Ningbo city, Zhejiang 315211,China.

JIanping Hu, Dong Zhou,and Ling Wang, “Power-gating flip-flops and sequential logic circuits ”IEEE ICCCAS’07, Fukuoka, Japan, july 2007.

Y. Moon and D. Jeong, “An efficient charge-recovery logic circuit,”IEEE Journal of Solid-State Circuits, vol. 31, no. 4, pp. 514-522, 1996.


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