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Table of Contents
Articles
FPGA Implementation of Reed-Solomon Error Correcting Code | |
Pranali P. Kale, Dr.R.S. Kawitkar | 386-391 |
Low Power Analog Multiplier using FGMOS Transistor | |
Dr.K. Duraisamy, U. Ragavendran | 392-395 |
An Efficient Barrel Shifter Design Using Testable Reversible Logic | |
Amita Nandal, Dr. T. Vigneswaran | 396-401 |
High Performance Electrical & Optical Interconnects | |
Jyoti Kedia, Dr. Neena Gupta | 402-405 |
Performance Study on Latent Heat Thermal Energy Storage in Solar System Using PCM | |
B. Kanimozhi, B.R. Ramesh Bapu | 406-411 |
Digital Simulation of Solid State Circuit Breaker using Simulink | |
A. Kalai Murugan, Dr.R. Raja Prabu | 412-415 |
An FPGA Implementation of Cochlear Implant Using Biorthogonal Wavelets | |
Nivin Ghamry | 416-422 |
CNTFET based SR Flip Flop | |
V. Saravanan, V. Kannan | 423-427 |
Implementation of Reconfigurable Redundant Radix- 4 Arithmetic Co-processor | |
M. Naveenkumar, Sunil S. Mathad | 428-435 |
Low Power and High Speed Clock Triggered Comparator using 0.18μm Technology | |
M. Naveenkumar, N.P. Suchithra, Jayashree C. Nidagundi, Sunil S. Mathad | 436-440 |
Embedded Controller for Automatic Muting System | |
V. Ramya, K. Karthick, Subash Prasad | 441-446 |
Design and Analysis of Interleaved Boost Converter for Fuel Cell Applications | |
Dr.R. Seyezhai | 447-452 |
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ISSN: 0974 – 9624