Table of Contents
Articles
| Optimized Power Utilization in Smart Hall Using Programmable Logic Controller (Plc) System |
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| R. Rakesh, S. Dhanaseelaraj, U. Saravanakumar | 69-72 |
| Single Phase Shunt Active Filter Interfacing Solar PV Array |
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| K.S. Jeevananthan | 73-78 |
| Modeling and Analyzing Cache for Multi-Core Processor |
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| Ram Prasad Mohanty, Ashok Kumar Turuk, Bibhudatta Sahoo | 79-83 |
| Investigation of Multiple Antennas in Cooperative Cognitive Relay Network |
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| E. Sadik, M. Shokair, A. Sharshar, S. Elhalafawy | 84-88 |
| Problems Identification & Proposed Solutions in ASIC Physical Designing |
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| Swarg J. Patel | 89-91 |
| Clock Power Reduction using Multi-Bit Flip-Flop |
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|
| Lincy Lincy, Sivasankar Rajamani | 92-96 |
| An Efficient Compression Based Optimized Iterative Clipping and Filtering Approach for PAPR Reduction in OFDM Systems |
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| V. Savarna, B. Kaarthick | 97-100 |
| Power Flow Control Using Distributed Flexible AC Transmission Systems |
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| P. Jagatheeswari, K. Suresh, P. Jeyaprabhu | 101-104 |
| Domino Based Low Leakage Circuit for Wide Fan-in or Gates |
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| S. Sindhu, C. Arun Prasath | 105-108 |
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ISSN: 0974 – 9624