| Issue | Title | |
| Vol 5, No 1 (2013) | Design of ADC for ECG Applications using 0.18μM CMOS Technology | Abstract |
| D. Jackuline Moni, H. Victor Du John | ||
| Vol 6, No 1 (2014) | Design of an Efficient FPA Architecture for Data Encryption and Authentication in Image using AES | Abstract |
| G. Yasotha | ||
| Vol 7, No 4 (2015) | Design of an Improved Finite Impulse Response (FIR) Filter using Vedic Multiplier | Abstract |
| Dr. M Maheswari, T Margret Rosy | ||
| Vol 4, No 13 (2012) | Design of Area Efficient Modified Carry Select Adder | Abstract |
| Dr.V. Nagarajan, V. Subapriya | ||
| Vol 3, No 10 (2011) | Design of Combustor Fueled with Methyl Esters of Cottonseed Oil | Abstract |
| K. Karuppasamy, K. VinuKumar, M. Jegesh David, N. Vedaraman | ||
| Vol 5, No 2 (2013) | Design of Control for Low Cost Wind Turbine using Boost Converters | Abstract |
| R. Sowthamani, S. Preethi | ||
| Vol 4, No 15 (2012) | Design of ECC Co-Processor Architecture and Estimation of Resource Binding with Increased Key Size | Abstract |
| A. Jagan, V. Nagarajan | ||
| Vol 7, No 3 (2015) | Design of Efficient Pre-Computation based CAM | Abstract |
| Pallavi Shivatare, V.G. Raut | ||
| Vol 4, No 4 (2012) | Design of High Speed Digitally Controlled SMPS by using QFET and ISA-PID in MSP-430 | Abstract |
| Kaliprasad Mahapatro | ||
| Vol 2, No 11 (2010) | Design of Hybrid Photovoltaic- Solid Oxide Fuel Cell Power System | Abstract |
| M. Venkateshkumar, Dr.R. Raghavan | ||
| Vol 9, No 9 (2017) | Design of Low Power 4 Bit Carry Select Adder Using 14T Transistor 1 Bit Adder | Abstract |
| Pooja Chawhan, Akanksha Sinha | ||
| Vol 10, No 8 (2018) | Design of Low Power 45NM Technology Base 11T SRAM Memory | Abstract |
| Ganesan Raghupathi, G. Eswaran, J. Chandru, S. Dinesh, Menaka Devi | ||
| Vol 5, No 6 (2013) | Design of Low Power and High Speed Reversible Multiplier | Abstract |
| G. Kanagavalli, M. Muthulakshmi | ||
| Vol 7, No 7 (2015) | Design of Low Power and High Stable SRAM Cell in 45nm Technology Using Cadence | Abstract |
| P.S. Siva Selva Kumar, S. Sudhakar, S. Vignesh, D. Jahnavi | ||
| Vol 3, No 6 (2011) | Design of Low Power Coarse Grained Reconfigurable Architecture by Reusable Context Pipelining | Abstract |
| C. Paramasivam, A. Punithavathi | ||
| Vol 4, No 2 (2012) | Design of Low Power SRAM by Reducing Wordline Pulsewidth | Abstract |
| M.K. Anjali, K.S Neelukumari | ||
| Vol 4, No 7 (2012) | Design of Low Rating Axial Flux Permanent Magnet Brushless DC Motor | Abstract |
| S.K. Shrikanth Rao, N. Ravi | ||
| Vol 10, No 10 (2018) | Design of Multiband I-Slot Microstrip Patch Antenna for Wireless Systems | Abstract |
| Pooja Japra, Ravi Singh | ||
| Vol 3, No 10 (2011) | Design of Multi-Threshold Flip Flops for Low Power Applications | Abstract |
| S. Dhamodharan, R. Balakumaresan, Dr. K. Vadivel | ||
| Vol 1, No 6 (2009) | Design of Novel Ultra-Low Leakage CMOS Sleepy Stack Structure for circuits with Low Leakage Power Consumption | Abstract |
| A. Karthikeyan, V. Srividhya | ||
| Vol 3, No 9 (2011) | Design of PI Controller for Multi Output Boost Converter | Abstract |
| K. Deepa, Abhay Gopi, Jyothis Sebastian, Arjun M. Sathyan, K. Sarad Manaswin, M. Shivapramod | ||
| Vol 6, No 8 (2014) | Design of RLS Wiener FIR Fixed-Lag Smoother in Linear Discrete-Time Stochastic Systems | Abstract |
| Seiichi Nakamori | ||
| Vol 10, No 5 (2018) | Design of SISO Shift Register by Using Pulse Triggered Flip-Flop for Effective Area and Power Minimization at 32nm Technology | Abstract |
| Sandeep Kumar | ||
| Vol 3, No 13 (2011) | Design of Smart Security System for Automobiles- GSM Embedded | Abstract |
| Sandhya Thiyagarajan, Ajay Sampath, C. Gautam Aggarwal | ||
| Vol 7, No 3 (2015) | Design of Stuck at Fault Testable Reversible Circuits | Abstract |
| S. Nandhini, Dr. R. Satyabama | ||
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ISSN: 0974 – 9624